1. Field of the Invention
The invention relates generally to devices which read information from a magnetic medium. More particularly, the invention concerns a control circuit to optimize write-to-read settling times of such a device.
2. Description of the Prior Art
Magnetic recording devices are used to write information to a magnetic medium either in analog or digital form. The magnetic medium is typically a tape, such as used in the well known compact cassette or known high density drives for computers which are used for backup purposes. Another common form is a disc, such as a floppy disc or a hard disc for storing programs and data in a computer.
The read channel for a magnetic recording device includes a sensor in the form of a magneto-resistive head in close proximity with the magnetic medium. When the magnetic material is moved relative to the sensor, a flux is induced in the sensor in dependence of the local orientation of the magnetic material, thereby generating an information signal which can be amplified and then decoded.
When information is written in digital form, such as for computer data storage or digital recording of music, a current is generated by a write channel and passed through a thin film head in one direction to write a binary xe2x80x9c1xe2x80x9d and in the opposite direction to write a xe2x80x9c1xe2x80x9d. When the medium is read by the sensor, or read head, the portions recorded with a binary xe2x80x9c1xe2x80x9d will induce a current in the head in the one direction and portions recorded with a binary xe2x80x9c1xe2x80x9d will induce a current in the opposite direction, which is then decoded by a bit detector.
Hard disk drives typically include multiple magnetic discs, or platters, each side of which are used for reading and writing information. The read heads and write heads are mounted on arms positioned at each side of the disk, and in modern systems, servo patterns are embedded in radial patterns on the disk. Reading and writing are interchanged in conformance with the servo patterns.
Write-to-read settling time is an important specification because it impacts directly with drive capacity. Write-to-read settling time is defined to be the time required for the read channel to settle and be able to read the next servo field after the write channel has stopped writing. The gap on the magnetic disk between the end of the write sector and the start of the servo field is wasted area and hence should be minimized.
The disturbance to the read channel during write-to-read transition comes mainly from three sources. The first source is a flexible cable which is conventionally used to electrically couple the integrated circuit which embodies the read and write channel circuitry to the write heads and read sensors. This cable has multiple conductors in close proximity, which is a source of interference. The circuitry for the write channel and the read channel are typically embodied on a single integrated circuit, referred to in the art as a xe2x80x9cpreamplifier ICxe2x80x9d. The preamplifier IC will have several read and write channels, grouped in read/write pairs for each read/write head combination in the device. The close physical proximity of the read channel circuitry and the write channel circuitry on the integrated circuit is a source of undesired capacitive coupling between the write and read channels. A third source of interference is from the connection pins, bond wires and bond pads on the integrated circuit, which may also be a source of unwanted coupling. The disturbances from each of these sources needs to be suppressed from propagating to the output of the read channel, so as to avoid errors in decoding the information read from the disc. On the other hand, excess suppression will also interfere with the proper reading of actual data.
The exact duration and nature of write-to-read disturbances are somewhat unpredictable. It depends on the assembly of the heads, sensors and flexible cable, as well as other sources as described above, and hence varies between models of hard disk drives assembled by a manufacturer of such devices. When designing a preamplifier IC, the designer must model the interference sources, based on design data provided by the disk drive manufacturer as well as past experience (if any) with other models of that manufacturer, to design a suitable filter for interference suppression for the read channel. After fabricating the preamplifier IC, the IC is tested in the intended hard disk of the manufacturer. If there is too little suppression or too much suppression, unacceptable read errors will occur and the designer will have to re-design the filters in the IC, necessitating changes to the mask set for the IC as well as re-fabrication of the preamplifier IC with the revised filters. Such an iterative process undesirably lengthens the design cycle, increasing costs for both the IC manufacturer and the manufacturer of the hard disk drive or other magnetic storage device.
Even after arriving at a suitable design for the preamplifier IC, the hard disk drive manufacturer still faces problems with chip-to-chip variations in the pre-amplifier ICs, as well as drive-to-drive variations in the assembly of the read sensors, write heads, flex cables and their interconnection with the preamplifier IC. While all elements may be xe2x80x9cwithin specxe2x80x9d, the combination of several elements near their outer tolerance limits will often yield a hard disk drive with a read error rate outside of acceptable limits.
In the present state of the art, suitable tools are not available to the IC manufacturer to avoid the above-mentioned iterations in the design cycle nor for the drive manufacturer to easily fix read error problems arising from normal chip-to-chip variations and variations in the head/sensor/cable interconnect.
Accordingly, there is a need for a device which enables reduction of write-to-read settling time. There is also a need for a way to allow users to program the duration and intensity of write-to-read correction so that it can be optimized easily without the need to reiterate the design cycle.
Generally speaking, according to one aspect of the invention, a magnetic information storage apparatus includes a write channel for writing information to a magnetic medium and a read channel for reading information from the magnetic medium. The read channel includes a sensor which generates an information signal in response to information stored on the magnetic medium. A signal path is coupled to the sensor and amplifies the information to provide an amplified information signal. When transitioning from a write mode in which the write channel is active to a read mode in which the read channel is active, the transition induces a write-to-read disturbance in the read channel. The signal path includes a filter having a zero which varies over frequency in a time-dependent manner related to the amplitude of the write-to-read disturbance.
By varying the low corner frequency (xe2x80x9cLCFxe2x80x9d) of the filter in a time-dependent manner, the attenuation of the filter can be set to generally match the amplitude of any write-to-read disturbances. Generally, this permits high filtering when the amplitude of the disturbance is expected to be high and low filtering when the amplitude of the disturbance is expected to be low. By not over filtering or under filtering, as is typically the case with prior art systems having a fixed attenuation filter at the front end of the read channel, reduced read error rates and reduced transition times are possible relative to the known systems.
According to a second aspect of the invention, the forward signal path has at least one gain stage and the time-dependent filter in the forward signal path is provided by a feedback path having a low pass filter with a pole which varies in a time-dependent manner and which couples the output of the at least one gain stage to the input of the at least one gain stage. Varying the pole of the low pass filter in the feedback path varies the zero in the forward path, and consequently the low corner frequency of the read channel. Favorably, the at least one gain stage is an emitter-follower, which has the benefit of wide bandwidth, unity gain, and common use in pre-amplifier IC""s as a buffer stage. The first two benefits simplify the feedback system by imposing few design constraints, while the latter benefit means the feedback system can be placed anywhere in the read channel such a buffer already exists.
According to a third aspect of the invention, the disturbance in the signal path caused by the write-to-read transition was found to have a relatively high initial peak amplitude followed by a long tail of decaying amplitude. To effectively filter this type of disturbance, the zero in the forward path is set to vary from a first relatively high frequency to a second relatively low frequency by varying the pole of the low pass filter from a third, relatively high frequency to a fourth relatively low frequency.
According to a fourth aspect of the invention, the low pass filter includes a variable capacitance, the variation of the capacitance moving the pole of the low pass filter. Favorably, the variable capacitance includes a plurality of switched capacitors. An equalization circuit is provided to equalize the voltage on each contact node of the capacitors to avoid transients when the capacitors are switched into the circuit.
According to a fifth aspect of the invention, the apparatus includes a programmable controller programmable by a user, such as a hard disk drive manufacturer, via an interface (such as a serial interface) to control the time-dependent characteristics of the user interface.
In a sixth aspect of the invention, the forward signal path of the read channel includes a plurality of gain stages. The location of the time-dependent zero is in the xe2x80x9cback endxe2x80x9d of the signal path, i.e. closer to the output of the signal path than the first gain stage. This helps in reducing DC offset of the read channel. Offset is the differential DC component at the output when the differential DC component at the input is zero, and is caused by mismatches in components, amplifier differential mismatches, and parasitic resistances in wiring.
Another aspect of the invention concerns a preamplifier integrated circuit which includes a read channel with one or more of the above mentioned features.
Yet another aspect of the invention is a method for filtering recurring transient disturbances in a signal path, the disturbances having an initiation point and decay. The method including filtering the signal with a filter having controllable attenuation and recurrently (i) at the initiation point of the transient disturbance, setting the attenuation of the filter at a first level to substantially filter the disturbance, and (ii) reducing the attenuation of the filter in a time dependent manner related to the decay of the disturbance from a first level to a second, lower level. According to another aspect of this method, the disturbance is triggered by an event in a device, said method further comprising sensing the event to set the filter at the first attenuation level. In another aspect of the invention, the attenuation level is changed from the first level to the second, lower level by moving a zero in the signal path from a first frequency to a second lower frequency.